References
[1]Tsuguo, K., Kazutaka, N., Tsukasa, S. and Yukihiro, F., “A Current-controlled Latch Sense Amplifier and a Static Power-saving Input Buffer for Low-power Architecture”, IEEE Journal of Solid-state Circuits, Vol. 28, No. 4, Apr. 1993.
[2] Nakagome, Y., “Design of Low Power 6T SRAM with Reduced Leakage Currents”, IBM J. RES. & DEV. Vol.47, No. 5/6 pp. 82, 2003.
[3] Toumazou, C., Lidgey, Fj. J., Haigh, D.G., Analoqzie IC Design: “The Current-Mode Approach”, Peter Peregrinus Ltd, London U.K, April 1990.
[4] Shimohigashi K. et al., “An n-well CMOS Dynamic RAM”, IEEE Trans. Electron Lkvices, Vol. ED-29, No. 4, pp.7 14-7 1 8, April 1982.
[5] Borivoje Nicolic et al. “Improved Sense-Amplifier- Based Flip-F1op: Design and Measurements”, IEEE Journal of Solid-State Circuits, ~01.35: No.6, pp .876-8 84, June 2000.
[6] Huang, H. Y. and Chen, S. L., “Self-Isolated Gain-Enhanced Sense Amplifier” IEEE Asia-Pacific Conference, pp. 57-60, 2002.
Tikrit Journal of Engineering Sciences (2016) 23(2) 96- 102
Design of Current Mode MTCMOS Sense Amplifier with Low Power and High Speed
Luqman Sufer Ali | Asmaa Salim Mayoof | |
Electrical Eng. Dept., University of Mosul, Iraq |
Abstract
This paper involved the design and analysis of multi-threshold voltage CMOS (MTCMOS) current sense amplifier focusing on optimizing power and time delay. In this work the basic 6T SRAM structure was chosen and the simulation is implemented using ADS programs. The key to low power operation in the SRAM data path is to reduce the signal swings on the bit lines and the data lines. The power dissipation and delay of the sense amplifier circuit can be further reduced by using several low power and high speed techniques like MTCMOS. This technique can be used for solving the leakage power dissipation problem in the higher technology design. Simulated results show the current mode sense amplifier with MTCMOS technology has 0.82ns time delay and 0.395μW power dissipation. The designs and simulations in 0.25μm CMOS technology with supply voltage equal to 1.8 V have been carried out to evaluate the efficiency of the current mode sense amplifier with MTCMOS technique proposed.
Download Full-Text PDF
Keywords: 6T SRAM cell, MTCMOS technology, Low power, High speed.